Image signal processing apparatus having a signal level corrector circuit

ABSTRACT

An image signal processing apparatus is provided and includes a YC separator circuit for extracting a chrominance signal from an image signal, a signal level detector circuit for outputting a signal level detecting signal by detecting a signal level of the chrominance signal and a signal level corrector circuit for correcting a signal level of the signal level detecting signal to generate a key signal according to the chrominance signal, the signal level corrector circuit including an oversampler circuit.

TECHNICAL FIELD

The present Invention relates to an image signal processing apparatussuitably applicable, for example, to an editing system and particularlyto composing image signals by generating a key signal with reference toa signal level for a chrominance signal without causing an incongruousfeeling even if a picture having little luminance signal component isprocessed.

BACKGROUND ART

In the editing system, it has been a conventional practice to makevarious processing for image signals by the key signal which isgenerated with reference to the luminance signal as a standard.

Specifically, the editing system of this type extracts the luminancesignal form an image signal which is an object of processing and makesthe gain of the luminance signal variable after clamping it to generatethe key signal. Further, with reference to the key signal, an imagesignal of background and the image signal to be processed are mixed eachother, thereby causing the image as the object of processing (see FIG.14B) to be fit into the image of background (see FIG. 14A) for producinga composed image (see FIG. 14C), for example.

In the meantime, the editing system may generate the key signal takingan image signal produced by the computer graphics as the object ofprocessing. In such an image signal as produced by the computergraphics, there may sometimes be included a picture of blue color, etc.having little luminance signal components.

If the key signal is generated with the luminance signal as a standardin connection with the picture of blue color, etc. having littleluminance components, the key signal will be generated in thinner form.Consequently, when processing the picture produced by the computergraphics by the key signal, the edition processed picture will bedisplayed played in the thinner shape. This will make the edited pictureto cause a sense of incongruity.

Thus, when letters of Y and C in FIG. 14B are displayed in white andblue, respectively, there is an inconvenience that, as is shown in FIG.14C, the letter C will be composed to be thinner than the letter Y inthe composed picture.

DISCLOSURE OF INVENTION

The present invention has been made in consideration of the foregoingpoint and aims to propose an image signal processing apparatus which iscapable an image signal without causing the incongruous feeling even ifthe picture having little luminance signal component is processed.

The present invention comprises a signal level detector circuit foroutputting a signal level detecting signal by detecting a signal level athe chrominance signal and a signal level corrector circuit forcorrecting a signal level of the signal level detecting signal togenerate a key signal according to the chrominance signal.

If the signal level detecting signal is obtained by detecting the signallevel of the chrominance signal and the key signal is then generatedwith reference to the chrominance signal from the signal level detectingsignal, it will be possible to raise the signal level of the key signalfor an area where the luminance signal is low level, thereby allowingthe picture composition to be performed satisfactorily on such area.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram showing a key signal generator circuit of theediting system according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a whole configuration of the editingsystem.

FIG. 3 is a signal wave form diagram serving for explanation of formingan absolute value of a digital chrominance signal.

FIG. 4 is a time chart serving for explanation of oversampling I signaldata and Q signal data.

FIG. 5 is a time chart serving for explanation of an interpolationprocessing of the I signal data and the Q signal data.

FIG. 6 is a time chart showing a relation between the I signal data, thesignal data and the digital luminance signal.

FIG. 7 is a characteristic curve diagram serving for explanation ofdetecting a scaler amount of the I signal data and Q signal data.

FIG. 8 is a signal wave form diagram serving for explanation ofgenerating the key signal with the key signal according to the luminancesignal and the key signal according to the chrominance signal.

FIG. 9 is a wave form diagram serving for explanation of generating thekey signal with only the key signal according to the luminance signal.

FIG. 10 is a signal wave form diagram serving for explanation ofgenerating the key signal with only the key signal according to thechrominance signal.

FIG. 11 is a block diagram showing a key signal generator circuit of theediting system according to a second embodiment of the presentinvention.

FIG. 12 is a characteristics curve diagram serving for explanation ofsetting a reference point when a picture of a signal color is to beprocessed.

FIG. 13 is a characteristic curve diagram serving for explanation ofsetting a reference point when a picture having hues within apredetermined range is to be processed.

FIGS. 14A-14C are schematic diagrams serving for explanation ofprocessing an image signal using the conventional key signal.

BEST MODE FOR CARRYING OUT THE INVENTION

Now, the embodiments according to the present invention will bedescribed in detail below with reference to accompanying drawings.

(1) The First Embodiment

FIG. 2 is a block diagram showing the editing system according to thefirst embodiment of the present invention. The editing system 1 causes athree-dimensional variation to a picture produced by a computer graphics(CG) unit 2 and then fits it into a predetermined background foroutputting the same.

The computer graphics unit 2 outputs a digital video signal DV1 which isto be processed by the editing system 1 and a key processing unit 3generates a key signal SK1 from the digital video signal DV1 by a keysignal generator circuit 4 in the unit.

A special effect unit 5 receives the digital video signal DV1 and thekey signal SK1, and outputs a digital video signal DV2 which is producedby causing the three-dimensional variation to the picture formed by thedigital video signal DV1 as well as a key signal SK2 which is generatedby causing the same variation.

In the key processing unit 3, an image signal composer circuit 6receives the digital video signal DV2 at its multiplier circuit 7A andweights it by the key signal SK2. The image signal composer circuit 6also receives a digital video signal DVS forming the background andweights it by a key signal SK3 whose signal level varies in acomplementary manner to the key signal SK2. In addition, the key signalSK3 is generated in the key processing unit 3 with the key signal SK2 asa standard. The image signal composer circuit 6 adds by an adder circuit8 these signals outputs from the multiplier circuits 7A and 7B, andoutputs a composed digital video signal DV3.

In the editing system 1, the digital video signals DV2 and DVS areweighted by respective weighting coefficients K and (1−K), and thenadded to be composed. By varying the signal level of the key signal SK1generated by the key signal generator circuit 4 and then varying valuesof those weighting coefficients K and (1−K) in a complementary manner,the picture produced by the computer graphics unit 2 will be fit intothe background formed by the digital video signal DVS.

A control panel 9 controls entire operation of the editing system 1 andsets clipping levels CLC, CLY and multiplying values GC, GY to the keysignal generator circuit 4 for generating the key signal to the keysignal generator circuit 4 in response to user's operation.

FIG. 1 is a block diagram showing the key signal generator circuit 4.The key signal generator circuit 4 inputs the digital video signal DVIto its YC separator circuit 10. In this case, the YC separator circuit10 is made of a three-dimensional filter, which separates the digitalvideo signal DV1 into a digital luminance signal DY and a digitalchrominance signal DC and then outputs the same.

In the digital video signal DV1, the sampling frequency is set to be afrequency 4 fsc four times the carrier frequency fsc of the chrominancesignal. As is shown in FIG. 3, the digital chrominance signal outputfrom the YC separator circuit 10 is produced by sampling the chrominancesignal at the sampling time with reference to the I axis and the Q axis,so that the signal is comprised of alternately repeating data DI, −DI,DI, −DI, . . . and DQ, −DQ, DQ, −DQ, . . . which correspond to the Isignal and the Q signal, respectively.

An absolute value forming circuit 11 forms absolute values of thedigital chrominance signal DC. In other words, the absolute valueforming circuit 11 converts the I signal component and the Q signalcomponent of the digital chrominance signal DC to the base band, andoutputs, as shown in FIG. 4, IQ signal data D1 (FIG. 4A) which iscomprised of alternately repeating I signal data DI0, DI2, . . . and Qsignal data DQ0, DQ2, . . . .

An oversampler circuit 12 receives the IQ signal data D1 output from theabsolute value forming circuit 11 and outputs this IQ signal data D1through a clock of double frequency. At this time, the oversamplercircuit 12 changes the data sequence in such a manner that, after twomeaningless data continue, a set of corresponding I signal data and Qsignal data will continue for outputting (FIG. 4B).

An interpolator circuit 13 receives the output data D2 of theoversampler circuit 12 and replaces those meaningless data interposedamong the output data D2 with data DI1, DQ1, DI3, DQ3, . . . which areinterpolating operation processed, for outputting (FIG. 4C).

In this interpolation processing, the interpolator circuit 13 performsthe interpolating operation processing according to following equationsto which the Lagrange's interpolation formula is applied.$\begin{matrix}\begin{matrix}{{{DI}\quad \left( {{2n} - 1} \right)} = \quad {{{- \frac{1}{16}}\quad {{DI2}\left( {n - 2} \right)}} + {\frac{9}{16}\quad {DI2}\quad \left( {n - 1} \right)} + {\frac{9}{16}{DI2n}} -}} \\{\quad {\frac{1}{16}{DI}\quad \left( {{2n} + 1} \right)}}\end{matrix} & (1) \\\begin{matrix}{{{DQ}\quad \left( {{2n} - 1} \right)} = \quad {{{- \frac{1}{16}}\quad {{DQ2}\left( {n - 2} \right)}} + {\frac{9}{16}\quad {DI2}\quad \left( {n - 1} \right)} + {\frac{9}{16}{DQ2n}} -}} \\{\quad {\frac{1}{16}{DQ}\quad \left( {{2n} + 1} \right)}}\end{matrix} & (2)\end{matrix}$

Thus, as is shown in FIGS. 5A and 5B, the interpolator circuit 13produces from four successive sampled I signal data DI2(n−2), DI2(n−1),DI2n, DI2(n+1) an I signal data DI2n−1 which is positioned at anintermediate among these four samples (FIG. 5A). Likewise, it producesfrom four successive sampled Q signal data DQ2(n−2), DQ2(n−1), DQ2n,DQ2(n+1) an Q signal data DQ 2n−1 which is positioned at an intermediateamong these four samples (FIG. 5B).

A demultiplexer 14 receives the output data of the interpolator circuit13 and separates them into the I signal data DI and the Q signal data DQfor outputting simultaneously in parallel. Thus, as is shown in FIG.6A-6C, the oversampler circuit 12, the interpolator circuit 13 and thedemultiplexer 14 interpose the interpolating operation processed data(shown by dotted lines) (FIGS. 6B and 6C) among the original I signaldata and Q signal data, and produce I signal data DI and Q signal dataDQ in which the sampling rate coincides with the sampling frequency 4fsc of the digital luminance signal DY (FIG. 6A). At this time, byapplying the Lagrange's interpolation operating formula to produce theinterposing data, lack of high frequency component is effectivelyavoided to restore the I signal component and the Q signal componentfaithfully.

A square summing circuit 15 receives the I signal data DI and the Qsignal data DQ outputted from the demultiplexer 14 and performs andoperation processing according to the following equation

D4=(DI²+DQ²)^(½)  (3)

for detecting a scaler amount D of the digital chrominance signal, asshown in FIG. 7, namely, a distance D from a reference point which isthe origin O of the I axis and the Q axis being reference axes of the Isignal and the Q signal.

A low pass filter (LPF) 16 removes an alias distortion component fromthe output data D4 of the square summing circuit 15 for outputting. Aclipper circuit 17 subtracts the clipping level CLC output by thecontrol panel 9 from the output data of the low pass filter (LPF) 16 foroutputting. Thus, the clipper circuit 17 sets a slice level forgenerating the key signal SKC by the clipping level CLC.

A multiplier circuit 19 weights the output data of the clipper circuit17 by the multiplying value GC output by the control panel 9 and outputsthe output data of the clipping circuit 17, for example, with 0 to100[%] amplitude of the digital video signal. Thus, the multipliercircuit 19 outputs the key signal SKC according to the chrominancesignal with the distance D from the origin O of the I axis and the Qaxis as a standard.

In this way, the absolute value forming circuit 11 and the squaresumming circuit 15 form the signal level detector circuit for detectingthe signal level of the chrominance signal. The multiplier circuit 19and the clipper circuit 17 form the signal level correcting means forgenerating the key signal SKC according to the chrominance signal bycorrecting the output signal level of the signal level detector circuit.

A clipper circuit 20 receives the digital luminance signal DY from theYC separator circuit 10 through a delay circuit 21 and subtracts thepredetermined clipping level CLY therefrom to output it. Thus, theclipper circuit 20 sets the slice level for generating the key signalSKY with reference to the luminance signal by the clipping level CLY.

A multiplier circuit 22 weights the output data of the clipper circuit20 by the multiplying value GY and output the output data for theclipper circuit 20, for example, with 0 to 100[%] amplitude of thedigital video signal. Thus, the multiplier circuit 22 outputs the keysignal SKY according to the luminance signal with the amplitude of theluminance signal as a standard.

The delay circuit 21 delays the digital luminance signal DY output bythe YC separator circuit 10 to output it, so that the output data of themultiplier circuit 22 may be output at a corresponding time to theoutput data of the multiplier circuit 19.

A NAM circuit 23 compares sequentially two output data SKC and SKY ofthe respective multiplier circuit 19 and 22, and selects the output dataSKC or SKY with greater signal level to select and output it as the keysignal SK1.

The multiplier circuit 22 and the clipper circuit 20 form a luminancesignal processing circuit for generating the key signal SKY according tothe luminance signal with the luminance signal as a standard. The NAMcircuit 23 forms a key signal composer circuit for composing the keysignal SKY according to the chrominance signal and the key signal SKCaccording to the chrominance signal and the outputs the composed keysignal SK1.

In the above configuration, the digital video signal DV1 output from thecomputer graphics unit 2 (FIG. 2) is input to the key signal generatorcircuit 4 where the key signal SK1 is generated.

In this key signal generator circuit 4 (FIG. 1), the digital videosignal DV1 is separated into the digital luminance signal DY and thedigital chrominance signal DC by the YC separator circuit 10 and thenthe digital chrominance signal DC is converted to the base band throughbeing made as the absolute value by the absolute value forming circuit11, thereby making the I signal and the Q signal to be demodulated.

I signal data and Q signal data D1 comprised of these I signal and Qsignal is interpolating operation processed through the oversamplercircuit 12 and the interpolator circuit 13, and the respective I signaldata and the Q signal data are converted to the data whose sampling ratecorresponds to that of the digital luminance signal DY.

In the interpolator circuit 13, the I signal data and Q signal data D1is interpolating operation processed according to the Lagrange'sinterpolation formula, thereby causing the deterioration of highfrequency component to effectively be avoided and causing the I signalcomponent and the Q signal component to be reproduced faithfully.thereafter, these I signal data and Q signal data are separated by thedemultiplexer 14 and then the distance from the origin of the I axis andthe Q axis is detected in the following square summing circuit 15,thereby making the signal level of the digital chrominance signal DC tobe detected from the scaler with these I axis and Q axis as a standard.

After the alias component is removed from the detected result of thesquare summing circuit 15 through the low pass filter 16, its signallevel is corrected by the clipper circuit 17 and the multiplier circuit19 for generating the key signal SKC according to the chrominancesignal.

In contrast, regarding the digital luminance signal DY, after theprocessing time is corrected by the delay circuit 21 correspondingly tothat of the digital chrominance signal DC, its signal level is correctedby the clipper circuit 20 and the multiplier circuit 22 for generatingthe key signal SKY according to the luminance signal.

Between the key signal SKY according to the luminance signal and the keysignal SKC according to the chrominance signal which are generated inthis manner, the NAM circuit 23 selects one of these signals with agreater signal level and also composes them, thus making the key signalSK1 to be generated.

This key signal SK1 is supplied to the special effect unit 5 togetherwith the digital video signal DV1 and is subjected to the variation.Thereafter, it is used in the image signal composer circuit 6 forcomposing the background digital video signal DVS and the digital videosignal DV2.

At that time, the clipping levels CLC and CLY of the respective clippercircuits 17 and 20 as well as the multiplying values GC and GY of therespective multiplier circuits 19 and 22 are set up by operating thecontrol panel. Accordingly, as is shown in FIGS. 8A-8F, when processingthe digital video signal DV1 including a white portion W and a blueportion B (FIG. 8A), the key signal SKY according to the luminancesignal (FIG. 8C) whose signal level varies depending on the luminancesignal level can be generated from the digital luminance signal DY (FIG.8B), whereas the key signal SKC according to the chrominance signal(FIG. 8E) whose signal level rises at the blue portion B includinglittle luminance signal component can be generated from the digitalchrominance signal (FIG. 8D).

Therefore, it is possible to generate the key signal SK1 (FIG. 8F) whichcan punch out both the white portion W and the blue portion B in thesame way, from both of the key signals SKY and SKC. Consequently, it ispossible to effectively avoid the thinning of the blue portion andcompose the image signal free of the sense of incongruity even whenprocessing the picture with little luminance signal component.

Moreover, as is shown in FIGS. 9A-9D, when processing the digital videosignal DV1 (FIG. 9A) by making the weighting coefficient GC in themultiplier circuit 19 extremely small, it is possible to generate thekey signal SK1 (FIG. 9D) with the luminance signal as a standard similarto the prior art from the key signal SKY according to the luminancesignal (FIG. 9B) and the key signal SKC according to the chrominancesignal (FIG. 9C), which enables the edition processing as before to becarried out.

On the contrary, as shown in FIGS. 10A-10D, when processing the digitalvideo signal DV1 (FIG. 10A) by making the weighting co efficient GY inthe multiplier circuit 22 extremely small, it impossible to generate thekey signal SK1 (FIG. 10D) with the chrominance signal as a standard fromthe key signal SKY according to the luminance signal (FIG. 10B) and thekey signal SKC according to the chrominance signal (FIG. 10C), therebyenabling the composed picture by the key signal SK1 to be givendifferent effects from conventional ones.

According to the above configuration, by generating the key signal ofthe chrominance signal from the signal level of the chrominance signal,it is possible to effectively avoid the thinning of the picture withlittle luminance signal component, thereby allowing the image signalwithout the incongruous feeling to be composed even when processing thepicture having little luminance signal component.

Furthermore, by composing the key signal according to the chrominancesignal and the key signal according to the luminance signal for use, itis possible not only to carry out the edition processing as before, butalso to give various effects differing the past ones usingpreferentially the key signal according to the chrominance signal.

(2) The Second Embodiment

FIG. 11 is a block diagram showing a key signal generator circuitapplicable to the edition system according to a second embodiment of thepresent invention. This key signal generator circuit 24 is appliedthereto in place of the key signal generator circuit 4 describedreferring to FIG. 2. Further, in the key signal generator circuit 24,common elements with the key signal generator circuit 4 according to thefirst embodiment are denoted by the corresponding reference numerals andso a redundant description is omitted.

The key signal generator circuit 24 has adder circuits 25 and 26interposed between the demultiplexer 14 and the square summing circuit15. By the these adder circuits 25 and 26, predetermined additionalvalues VI and VQ are added to the I signal data DI and the Q signal dataDQ respectively, thus making the signal levels of the I signal data DIand the Q signal data DQ to be offset. In this regard, the additionalvalues VI and VQ are arranged to be freely set within the predeterminedrange aground zero level as a center by operating an operating elementdisposed on an operating panel of the editing system.

Accordingly, as is shown in FIG. 12, the key signal generating circuit24 makes these additional values VI and VQ variable so as to freely seta reference point 01 on a coordinates plane formed by the I axis and theQ axis, and is arranged to detect the scaler D of the digitalchrominance signal DC with reference to the reference point 01 as astandard, namely, the distance D from the reference point 01.

Therefore, when generating the key signal with reference to the digitalchrominance signal DC, in order to generate the key signal for differenthues in the same way, setting the origin O as the reference point anddetecting the distance D will allow the desired key signal to begenerated, as described above on the first embodiment. In other words,if the hue of the picture to be processed varies depending on time orthe like, it will be possible to produce the composed picture free ofthe incongruous sense by setting the origin O as the reference point.

In this case, for example, if it is desired to increase the key signallevel of blue color forming an angle of about 180° with yellow color onthe IQ plane relatively to the yellow color, namely, when the bluepicture is composed in the thinner shape than the yellow picture, thedesired key signal can be generated by shifting the reference point 01to the yellow color side using the additional value VI and VQ. Inaddition, when the picture for which the key signal is to be generatedis of a single color, by making the additional values VI and VQ variableand then setting the reference point 01 so that a straight lineconnecting the origin O to a position of the object to be processed onthe IQ plane and a straight line connecting the reference point 01 tothe origin O may form 180° as shown in FIG. 12, it is possible to detectthe distance D whose value is greater as compared with the picture ofother hue regarding this single color picture. In this way, concerningthe single color picture, it is possible to generate the key signalhaving the signal level differing from other hue picture, which enablesthe single color picture to be composed without the sense ofincongruity.

In contrast, as is shown in FIG. 13, when composing pictures of the hueswithin the range of a predetermined angle θ on the IQ plane, it ispossible to generate the key signal by different signal level from thatof the other hue picture regarding the picture within this range bymaking the additional value VI and VQ to be variable, which enables thepicture within this range to be composed without causing the sense ofincongruity.

According to the configuration shown in FIG. 11, by making the referencepoint 01 for detecting the distance to be freely changed, in addition tothe advantageous effect of the first embodiment, it is possible tocompose the image signal at further liberty and without giving theincongruous feeling and to create further effects which differ fromthose before.

(3) Other Embodiment

Having described, in the above embodiments, the case where theinterpolating operation processing is performed by using the Lagrange'sinterpolation formula, the present invention is not to limited theretoand may widely utilize various interpolation operation means. Also, thenumber of samples used for the interpolating operation is notrestrictive to four samples including previous and subsequent one, andcan be selected to different numbers as the need arises.

Moreover, having described in the above embodiments the case where thescaler amount of the I signal and the Q signal is detected by thefinding the square root of the square sum of the signal data and the Qsignal data, the present invention is not limited thereto and may omitthe square root finding processing or may change the multiplying valueof the multiplier circuit 19 by that amount.

According to the present invention described above, by generating thekey signal with reference to the signal level of the chrominance signalas a standard, it is possible to ensure the satisfactory pictureprocessing even when processing the picture of little luminance signalcomponent, thereby enable the image signals to be composed withoutcausing the sense of incongruity.

What is claimed is:
 1. An image signal processing apparatuscharacterized by comprising: a YC separator circuit for extracting achrominance signal from an image signal; a signal level detector circuitfor outputting a signal level detecting signal by detecting a signallevel of said chrominance signal, said signal level detector circuitincluding an oversampler circuit; a signal level corrector circuit forcorrecting a signal level of said signal level detecting signal togenerate a key signal according to said chrominance signal.
 2. The imagesignal processing apparatus according to claim 1, characterized in that:said signal level detector circuit produces said signal level detectingsignal by detecting a distance of an I signal and a Q signal formingsaid chrominance signal from a predetermined reference point on acoordinates plane formed by an I axis and a Q axis.
 3. The image signalprocessing apparatus according to claim 2 characterized by comprising anadjuster circuit for making a position of said reference point to bevariable.
 4. The image signal processing apparatus according to claim 1,characterized in that: said signal level corrector circuit includes aclipper circuit for clipping said signal level detecting signal, and amultiplier circuit for weighting an output signal of said clippercircuit to output the key signal according to said digital chrominancesignal.
 5. The signal processing apparatus according to claim 1,characterized in that: said signal level corrector circuit includes aluminance signal processing circuit for generating a key signalaccording to a luminance signal with the luminance signal as a standard,and a key signal composer circuit for composing said key signalaccording to said luminance signal and said key signal according to saidchrominance signal to output a composed key signal.
 6. An image signalprocessing apparatus comprising: a YC separator circuit for extracting achrominance signal from an image signal, said image signal is formed bya digital signal c; a signal level detector circuit for outputting asignal level detecting signal by detecting a signal level of saidchrominance signal and said signal level detecter circuit produces adigital chrominance signal by extracting a chrominance, I and Q signalcomponents from the digital signal, said digital chrominance signalbeing interpolating operation processed, thereby causing a sampling rateof the I signal component and the Q signal component to be corrected sothat they are equal a sampling rate of a luminance signal, for detectingsaid signal level of said chrominance signal; a signal level correctorcircuit for correcting a signal level of said signal level detectingsignal to generate a key signal according to said chrominance signal.